Dr. Ahmed Louri is the David and Marilyn Karlgaard Endowed Chair Professor of Electrical and Computer Engineering at the George Washington University, which he joined in August 2015. He is also the Director of the High Performance Computing Architectures and Technologies Laboratory (HPCAT https://hpcat.seas.gwu.edu/). Dr. Louri received the Ph.D. degree in Computer Engineering from the University of Southern California, Los Angeles, California in 1988. From 1988 to 2015, he was a Professor of Electrical and Computer Engineering at the University of Arizona, and during that time, he served six years (2000 to 2006) as the Chair of the Computer Engineering Program. Throughout his career, he has held invited visiting scientist positions and served as a research fellow at various institutions, including the University of Electro-Communications, Chofu, Japan; the Communications Research Laboratory, Tokyo, Japan; the Laboratoire d’Informatique du Parallelism, Lyon, France; the University of Tsukuba, Tsukuba, Japan; the University of Paul Sabatier, Toulouse, France; and the Centre Nationale de Recherche Scientifique (CNRS), Toulouse, France.
From 2010 to 2013, Dr. Louri served as a program director in the National Science Foundation's (NSF) Directorate for Computer and Information Science and Engineering. He directed the core computer architecture program and was on the management team of several cross-cutting programs, including: Cyber-Physical Systems; Expeditions in Computing; Computing Research Infrastructure; Secure and Trustworthy Cyberspace; Failure-Resistant Systems, Science Engineering and Education for Sustainability; and Cyber-Discovery Initiative, among others. While at NSF, Dr. Louri initiated multidisciplinary research programs in several key areas of computer architecture, high-performance computing, sustainability, emerging technologies, resiliency, and security. He played a key role in the creation of the Scalable Parallelism in the Extreme program, which is now in its fourth year.
Dr. Louri conducts research in the broad area of computer architecture and parallel computing, with emphasis on interconnection networks, scalable parallel computing systems, versatile and flexible computing systems, and power-efficient, reliable, and secure Network-on-Chips (NoCs) for multicore architectures. Recently, he has been concentrating on: energy-efficient, reliable, and high-performance many-core architectures; accelerator-rich reconfigurable heterogeneous architectures; secure network-on-chips for multicores and SoCs; approximate computing and communications; machine learning techniques for efficient computing, memory, and interconnect systems; heterogeneous manycore architectures & chiplet-based designs; emerging interconnect technologies (photonic, wireless, RF, hybrid) for multi-core architectures and chip multiprocessors (CMPs); future parallel computing models and architectures (including convolutional neural networks, deep neural networks, and approximate computing); and cloud-computing and data centers. He has published more than 200 refereed journal articles and peer-reviewed conference papers and is the co-inventor on several US and international patents. His early work explored optics’ unique properties to advance computing and communications. He was instrumental in bringing optical interconnects into mainstream research in computing and played a critical role in bridging the gap between the computer architecture and optics research communities. He received the Best Article Award from IEEE Micro, and was runner-up for the best paper award at several conferences.
Dr. Louri is the recipient of IEEE Computer Society 2020 Edward J. McCluskey Technical Achievement Award, "for pioneering contributions to the solution of on-chip and off-chip communication problems for parallel computing and manycore architectures.” The IEEE Computer Society Edward J. McCluskey Technical Achievement Award is given for outstanding and innovative contributions to the fields of computer and information science and engineering or computer technology, usually within the past 10 to 15 years. Contributions must have significantly promoted technical progress in the field.
Dr. Louri’s research has been sponsored by NSF, Department of Energy, Air Force Office of Scientific Research, the David and Marilyn Karlgaard Endowment Fund, and industrial corporations such as Intel, IBM, Cisco, Sun Microsystems (now Oracle), Raytheon, Physical Optics Corporation, and US West Technologies.
Dr. Louri is a Fellow of the Institute of Electrical and Electronics Engineers (IEEE), a member of IEEE Computer Society (CS) Technical Committee on Computer Architecture, the IEEE CS Technical Committee on Parallel Processing, the IEEE CS Technical Committee on Microprocessors & Microcomputers, and the Optical Society of America. He is the recipient of the highly competitive and prestigious NSF Research Initiation Award (now called the NSF CAREER Award), the Advanced Telecommunications Organization of Japan Fellowship, the CNRS Research Excellence Fellowship, the Japan Society for the Promotion of Science Fellowship, and the NSF Outstanding Service Award in recognition of his outstanding service to the field of computing and the research community, as well as several teaching awards.
Dr. Louri served as program area chair of the 34th IEEE International Parallel & Distributed Processing Symposium (IPDPS-2020), the general chair for the 25th IEEE CS Annual Symposium of the High Performance Computer Architecture (HPCA, 2019), the general chair of the 21st IEEE International Conference on High Performance Computing and Communications (HPCC-2019), the general chair of the 13th IEEE CS Annual Symposium of the High Performance Computer Architecture (HPCA, 2007), the general co-chair of the Second Workshop on Optics in Communications and Computer Sciences (1999); and the general chair for the Workshop on Optics in High-Performance Computing Systems (1996). He was the founding member of the NSF Workshop on Emerging Technologies for Interconnects (WETI, 2012), and the NSF Workshop on Cross-Layer Power Optimization and Management (CPROM, 2012). Findings and recommendations of the WETI and CPROM workshops played a critical role in NSF research initiatives in these areas.
Dr. Louri is the Editor-in-Chief of the IEEE Transactions on Computers (2019 -2023), the flagship journal for the IEEE Computer Society. He is also currently serving as associate editor for the IEEE Transaction on Sustainable Computing (2016 – present) and IEEE Transactions on Cloud Computing (2020 – present). He previously served on the editorial boards for IEEE Transactions on Computers (2011 – 2016), IEEE Transactions on Emerging Technologies for Computing (2015 - 2019), and Cluster Computing, the Journal of Networks, Software Tools and Applications (2000 – 2010). Since January 2016, he has served on the steering committee for IEEE Transactions on Sustainable Computing. He also served as guest editor for special issues in the Journal of Parallel and Distributed Computing (2010). Dr. Louri’s recent IEEE CS committee service includes being: chair for the IEEE Computer Architecture Letters Editor-in-Chief Search Committee (2021), vice-chair for the IEEE CS Fellow Evaluation Committee (2021), chair for the IEEE Transactions on Cloud Computing Editor-in-Chief Search Committee (2019), chair for the IEEE CS Fellow Evaluation Committee (2019), an evaluator on the IEEE CS Fellow Evaluation Committee (2012), vice-chair for the IEEE CS Fellow Evaluation Committee (2017 and 2018), and a member of IEEE CS Computer Entrepreneur Award Committee (2017).
For over 30 years, Dr. Louri has served and continues to serve on the executive and technical program committees of numerous international conferences, including the IEEE Symposium on High Performance Computer Architecture (HPCA), the International Symposium on Computer Architecture (ISCA), the International Parallel & Distributed Processing Symposium (IPDPS), the International Conference on Parallel Processing (ICPP), ACM/IEEE Symposium on Architectures for Networking & Communication Systems (ANCS), IEEE/ACM International Symposium on Microarchitecture (Micro), the International Conference on Parallel Architectures & Compilation Techniques (PACT), ACM/IEEE International Symposium on Networks-on-Chips (NOCS), IEEE Hot Interconnects, the Optical Society of America, meetings on Optics in Computing, among many others. He also was invited as panel moderator of several conferences including NOCS, HPCA, and HPCC. He has served and continues to serve as a reviewer and panelist of funding agencies, including NSF, Agence Nationale de la Recherche (France), Qatar National Research Foundation, Hong Kong National Research Council, European Research Council, and others. He is often invited to be the keynote speaker at various conferences.