• F. Lombardi, Z. Wang, S. Liu, P. Reviriego, A. Louri, and Fabrizio Lombardi, "ASIC Design of Nanoscale Artificial Neural Networks for Inference/Training by Floating-Point Arithmetic,” in IEEE Transactions on Nanotechnology, vol. 23, pp. 208-216, February 2024.
  • Y. Li, A. Louri, and A. Karanth, "MERIT: A Sustainable DNN Accelerator Design with Photonic Phase-Change Memory," in IEEE Transactions on Sustainable Computing (TSUSC), early access, pp. 1-12, December 2024. 
  • Z. Wang, F. Niknia, S. Liu, P. Reviriego, A. Louri, and F. Lombardi, "Fault Tolerance in Triplet Network Training: Analysis, Evaluation and Protection Methods" in IEEE Transactions on Emerging Topics in Computing (TETC), pp. 1–10, doi: 10.1109/TETC.2024.3481962, October 2024.
  • Y. Chen, A. Louri, S. Liu, and F. Lombardi, "A Balanced Sparse Matrix Convolution Accelerator for Efficient CNN Training," in IEEE Transactions on Circuits and Systems I: Regular Papers, pp. 1–14, doi: 10.1109/TCSI.2024.3430831, 2024.
  • Y. Zhao, K. Wang, and A. Louri, "OPT-GCN: A Unified and Scalable Chiplet-based Accelerator for High-Performance and Energy-Efficient GCN Computation," in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), May 2024.
  • J. Yang, H. Zheng, and A. Louri, "Versa-DNN: A Versatile Architecture Enabling High-Performance and Energy-Efficient Multi-DNN Acceleration," in IEEE Transactions on Parallel and Distributed Systems (TPDS), vol. 35, no. 2, pp. 349-361, February 2024.
  • Y. Chen, A. Louri, F. Lombardi, and S. Liu, "Chiplet-GAN: Chiplet-based Accelerator Design for Scalable Generative Adversarial Network Inference," in IEEE Circuits and System Magazine, vol. 24, no. 3, pp. 19-33, DOI: 10.1109/MCAS.2024.3359571, third quarter 2024.
  • Y. Li, A. Louri, and A. Karanth, "A High-Performance and Energy-Efficient Photonic Architecture for Multi-DNN Acceleration," in IEEE Transactions on Parallel and Distributed Systems (TPDS), DOI: 10.1109/TPDS.2023.3327535, October 2023. [PDF]
  • K. Wang, H. Zheng, J. Li, and A. Louri, "Morph-GCNX: A Universal Architecture for High-Performance and Energy-Efficient Graph Convolutional Network Acceleration," in IEEE Transactions on Sustainable Computing (TSUSC), DOI: 10.1109/TSUSC.2023.3313880, September 2023. []