Research Topic

Machine Learning For High Performance Reliable On-chip/Off-chip Communications

Current Researchers: Dr. Ke Wang, Dr. Hao Zheng, Yuan Li, Yingnan Zhao, and Jiaqi Yang;

With continued aggressive technology scaling, Network-on- Chips (NoCs) architectures are facing three major challenges including minimizing power consumption, scaling performance and providing a reliable and robust communication limited by area, power, and cost constraints.

Researchers have proposed various techniques individually tackling these challenges, while few efforts to date have simultaneously targeted improving power, performance and reliability altogether. Due to the complexity of the interactions among three competing objectives and explosion of design space, it is harder to manually design rules and strategies for an interconnection system for optimal power, reliability and performance.

In our research, we use Machine Learning (ML) algorithms, which can work with high-dimensional data and automatically infer complex decisions, to balance reliability, performance, and energy efficiency for NoCs. We first use supervised ML algorithms to build predictive decision models, which can optimize competing goals of two of the three targets (e.g. reliability and performance, performance and power, etc.).

We further use reinforcement learning (RL) to eschew the prediction step and automatically learn a decision policy that directly maps system-level states to optimal decisions which can yield maximum benefits on reducing power, enhancing reliability, and improving performance simultaneously.