Research Topic

Application-Aware Reconfigurable Manycore Architectures

Current Researchers: Hao Zheng, Jiaqi Yang;

The proliferation of many cores enables the simultaneous execution of multiple applications on Chip Multiprocessors (CMPs). Oftentimes, these applications have diverse computation and communication behavior, resulting in a heterogeneous computing environment. It is desirable to simultaneously satisfy the heterogeneous demands of multiple applications running on the CMPs. However, designing such a computer system is challenging due to the exploded design space and dynamic application behavior.

To handle this challenge, we design a reconfigurable NoC design to dynamically support the diverse communication demands of applications running simultaneously on the system. Furthermore, we explore the use of machine learning (ML) to manage the design complexity due to the exploded design space and dynamic application behavior. 
High Performance Computing Architectures & Technologies Lab

Department of Electrical and Computer Enginnering
School of Engineering and Applied Science
The George Washington University

800 22nd Street NW
Washington, DC 20052
United States of America 


Ahmed Louri, IEEE Fellow
David and Marilyn Karlgaard Endowed Chair Professor of ECE
Director,  HPCAT Lab 

Phone: +1 (202) 994 8241